When designing and maintaining large computing systems it is generally desirable to evaluate the links between integrated chips located at different points within the system to ensure that data transmission between such chips is not disrupted during normal operation. In particular, links carrying data at high transmission rates should be examined for pattern sensitivity since such sensitivity could be particularly disruptive to high frequency data transmissions. Pattern sensitivity may arise, for example, when the data abruptly changes from a sequence of logical ones to a sequence of logical zeros because of sudden changes in local voltage levels.
Prior art approaches to testing links have generally involved executing programs on a CPU (central processing unit) or other computing entity, driving a data sequence over the link and then testing the accuracy of the data received at the other end of the link. Employing software executed on CPUs to generate data patterns for transmission across a link experiences certain limitations which are discussed below.
FIG. 1 depicts a block diagram 100 representing an approach to testing a data link according to a prior art solution. It may be seen that test data emerging from CPU 101 is generally lined up in queues 104 along with data from memory 102 and I/O (input/output system) 103. In this situation, test data may end up being interspersed with data from the other devices, thereby possibly preventing transmission of a continuous test data pattern from CPU 101 as originally configured. While the test data may generally be separated from the other data after transmission over high speed link 106 at the other end of the link, the mixing of data from diverse sources may prevent proper testing of the link employing the characteristics of the data pattern. The lack of direct control of the contents of data transmission over the high speed link 106 during transmission of test data from CPU 101 is one factor preventing the link from being tested in an optimal manner. The mixing of data from the diverse sources may operate to prevent transmission of data patterns, particularly data patterns which most fully exercise the link in extreme circumstances.
Accordingly, it is a problem in the art that test data may be combined with data from non-testing data sources, thereby compromising the integrity of the sequence of data values in a selected test pattern.
It is a further problem in the art that the source of test data is not able to fully control the link during transmission of test data.